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Yifan Wang
RDStackingProject
Commits
ec383f7b
Commit
ec383f7b
authored
4 years ago
by
Francisco Jimenez Forteza
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Merge branch 'master' of
https://gitlab.aei.uni-hannover.de/xisco/rdstackingproject
parents
9f84718a
425429ff
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1 changed file
code_new/Sumit/config_fixed_n6_m_af.ini
+37
-31
37 additions, 31 deletions
code_new/Sumit/config_fixed_n6_m_af.ini
with
37 additions
and
31 deletions
code_new/Sumit/config_fixed_n6_m_af.ini
+
37
−
31
View file @
ec383f7b
...
...
@@ -16,22 +16,22 @@ sampler = rwalk
nr_code
=
SXS
dlogz
=
0.01
qnm_model
=
berti
nb_cores
=
4
nb_cores
=
8
[rd-model]
model
=
w-tau-fixed-m-af
error_str
=
Fals
e
error_val
=
0
error_str
=
Tru
e
error_val
=
0
.02
phase_alignment
=
True
fit_noise
=
Fals
e
fit_noise
=
Tru
e
[time-setup]
tshift
=
1
0
tshift
=
0
tend
=
90
t_align
=
0
[n-tones]
nmax
=
3
nmax
=
6
[n-live-points]
npoints
=
8000
...
...
@@ -64,6 +64,14 @@ w3_max = 0.7
w4_min
=
0.35
w4_max
=
0.7
[prior-w5]
w5_min
=
0.35
w5_max
=
0.7
[prior-w6]
w6_min
=
0.35
w6_max
=
0.7
[prior-tau0]
tau0_min
=
8
tau0_max
=
16
...
...
@@ -84,6 +92,14 @@ tau3_max = 2.35
tau4_min
=
0
tau4_max
=
1.8
[prior-tau5]
tau5_min
=
0
tau5_max
=
1.8
[prior-tau6]
tau6_min
=
0
tau6_max
=
1.8
[prior-q0]
q0_min
=
12
q0_max
=
30
...
...
@@ -104,6 +120,14 @@ q3_max = 15
q4_min
=
0
q4_max
=
15
[prior-q5]
q5_min
=
0
q5_max
=
15
[prior-q6]
q6_min
=
0
q6_max
=
15
[prior-amp0]
amp0_min
=
0
amp0_max
=
3
...
...
@@ -124,32 +148,13 @@ amp3_max = 30
amp4_min
=
0
amp4_max
=
50
[prior-phase0]
phase0_min
=
0
phase0_max
=
1
[prior-phase1]
phase1_min
=
0
phase1_max
=
1
[prior-phase2]
phase2_min
=
0
phase2_max
=
1
[prior-phase3]
phase3_min
=
0
phase3_max
=
1
[prior-amp5]
amp5_min
=
0
amp5_max
=
50
[prior-phase4]
phase4_min
=
0
phase4_max
=
1
[prior-noise]
noise_min
=
-30
noise_max
=
3
amp6]
[prior-amp6]
amp6_min
=
0
amp6_max
=
10
0
amp6_max
=
5
0
[prior-phase0]
phase0_min
=
0
...
...
@@ -181,4 +186,5 @@ phase6_max = 1
[prior-noise]
noise_min
=
-30
noise_max
=
10
noise_max
=
3
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